summaryrefslogtreecommitdiff
path: root/FPGA/top/message.bsf
diff options
context:
space:
mode:
Diffstat (limited to 'FPGA/top/message.bsf')
-rw-r--r--FPGA/top/message.bsf43
1 files changed, 0 insertions, 43 deletions
diff --git a/FPGA/top/message.bsf b/FPGA/top/message.bsf
deleted file mode 100644
index 9e08aba..0000000
--- a/FPGA/top/message.bsf
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2WARNING: Do NOT edit the input and output ports in this file in a text
3editor if you plan to continue editing the block that represents it in
4the Block Editor! File corruption is VERY likely to occur.
5*/
6/*
7Copyright (C) 1991-2013 Altera Corporation
8Your use of Altera Corporation's design tools, logic functions
9and other software and tools, and its AMPP partner logic
10functions, and any output files from any of the foregoing
11(including device programming or simulation files), and any
12associated documentation or information are expressly subject
13to the terms and conditions of the Altera Program License
14Subscription Agreement, Altera MegaCore Function License
15Agreement, or other applicable license agreement, including,
16without limitation, that your use is for the sole purpose of
17programming logic devices manufactured by Altera and sold by
18Altera or its authorized distributors. Please refer to the
19applicable agreement for further details.
20*/
21(header "symbol" (version "1.1"))
22(symbol
23 (rect 16 16 184 96)
24 (text "message" (rect 5 0 41 12)(font "Arial" ))
25 (text "inst" (rect 8 64 20 76)(font "Arial" ))
26 (port
27 (pt 0 32)
28 (input)
29 (text "adr[4..0]" (rect 0 0 34 12)(font "Arial" ))
30 (text "adr[4..0]" (rect 21 27 55 39)(font "Arial" ))
31 (line (pt 0 32)(pt 16 32)(line_width 3))
32 )
33 (port
34 (pt 168 32)
35 (output)
36 (text "do[7..0]" (rect 0 0 29 12)(font "Arial" ))
37 (text "do[7..0]" (rect 118 27 147 39)(font "Arial" ))
38 (line (pt 168 32)(pt 152 32)(line_width 3))
39 )
40 (drawing
41 (rectangle (rect 16 16 152 64)(line_width 1))
42 )
43)